Test Scheduling in an IEEE P1687 Environment with Resource and Power Constraints
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/6114262/6114277/06114729.pdf?arnumber=6114729
Cited by 16 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. A Multi-Objective Evolutionary Approach for Test Network Design;2024 IEEE European Test Symposium (ETS);2024-05-20
2. RC-IJTAG: A Methodology for Designing Remotely-Controlled IEEE 1687 Scan Networks;2023 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT);2023-10-03
3. Synthesis of IJTAG Networks for Multi-Power Domain Systems on Chips;2023 IEEE European Test Symposium (ETS);2023-05-22
4. Power-aware test scheduling framework for IEEE 1687 multi-power domain networks using formal techniques;Microelectronics Reliability;2022-07
5. Improving IJTAG Test Efficiency and Security;2022 International Symposium on VLSI Design, Automation and Test (VLSI-DAT);2022-04-18
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