A 1.2ps-jitter fully-synthesizable fully-calibrated fractional-N injection-locked PLL using true arbitrary nonlinearity calibration technique-Reference-Cited by-同舟云学术

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A 1.2ps-jitter fully-synthesizable fully-calibrated fractional-N injection-locked PLL using true arbitrary nonlinearity calibration technique

Published:2018-04 Issue: Volume: Page:
ISSN:
Container-title:2018 IEEE Custom Integrated Circuits Conference (CICC)
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Author:

Liu Bangan,Pang Jian,Narayanan Aravind Tharayil,Yang Dongsheng,Liu Hanli,Okada Kenichi,Matsuzawa Akira,Ngo Huy Cu,Nakata Kengo,Deng Wei,Zhang Yuncheng,Qiu Junjun,Yoshioka Torn,Emmei Jun,Zhang Haosheng

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8355238/8357004/08357041.pdf?arnumber=8357041

Cited by 7 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Fractional-N PLL for Multi-phase Clock Generation with Loop Bandwidth Enhancement;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19

2. Fractional-N Digital MDLL With Injection-Error Scrambling and Calibration;IEEE Journal of Solid-State Circuits;2024-01

3. Design of Synthesizable Digital Phase Locked Loops;IPSJ Transactions on System and LSI Design Methodology;2024

4. PLL Fractional Spur’s Impact on FSK Spectrum and a Synthesizable ADPLL for a Bluetooth Transmitter;IEEE Journal of Solid-State Circuits;2023-05

5. A Fractional-N Synthesizable PLL Using DTC-Based Multistage Injection With Dithering-Assisted Local Skew Calibration;IEEE Journal of Solid-State Circuits;2022-10

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