Collective Die-to-Wafer Self-Assembly for High Alignment Accuracy and High Throughput 3D Integration
Author:
Affiliation:
1. Univ. Grenoble Alpes,CEA-LETI,Grenoble,France,38000
2. Intel Corporation,Chandler,Az,USA
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9816066/9816372/09816674.pdf?arnumber=9816674
Reference11 articles.
1. Surface tension-driven self-alignment
2. Evaluation of alignment accuracy on chip-to-wafer self-assembly and mechanism on the direct chip bonding at room temperature
3. High density chip-to-wafer integration using self-assembly: On the performances of directly interconnected structures made by direct copper/oxyde bonding
4. Controlling nucleation and growth of water using hybrid hydrophobic-hydrophilic surfaces
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