Heterogeneous Integration for Chiplets on FOWLP Development Line
Author:
Affiliation:
1. A*STAR (Agency for Science, Technology and Research),Institute of Microelectronics,Singapore,138634
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9816066/9816372/09816608.pdf?arnumber=9816608
Reference13 articles.
1. FOWLP Design for Digital and RF Circuits;guan;69th Electronic Components and Technology Conference (ECTC),2019
2. Fine Pitch Line/Space Lithography for Large Area Package with Multi-Field Stitching
3. Heterogeneous Integration with Embedded Fine Interconnect
4. Fan-Out Wafer Level Packaging Development Line;tc;Proc 23th Electron Packag Technol Conf,2021
5. High Density Interconnection for Heterogeneous Integration on FOWLP Platform
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