50 nm Overlay Accuracy for Wafer-to-wafer Bonding by High-precision Alignment Technologies-Reference-Cited by-同舟云学术

50 nm Overlay Accuracy for Wafer-to-wafer Bonding by High-precision Alignment Technologies

Published:2023-05 Issue: Volume: Page:
ISSN:
Container-title:2023 IEEE 73rd Electronic Components and Technology Conference (ECTC)
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Author:

Mitsuishi Hajime¹,Mori Hiroshi¹,Maeda Hidehiro¹,Ushijima Mikio¹,Kamashita Atsushi¹,Okada Masashi¹,Aramata Masanori¹,Shiomi Takashi¹,Sakamoto Shinya¹,Takahata Kishou¹,Chiba Tomohiro¹,Fukuda Minoru¹,Kanbayashi Masahiro¹,Shimoda Toshimasa¹,Sugaya Isao¹

Affiliation:

1. NIKON CORPORATION,Yokohama,Japan

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10195193/10195244/10195620.pdf?arnumber=10195620

Reference6 articles.

1. Wafer to Wafer Hybrid Bonding for DRAM Applications

2. Unleash Scaling Potential of 3D NAND with Innovative Xtacking® Architecture

3. Demonstration of 50 nm Overlay Accuracy for Wafer-to-Wafer Bonding and Further Improvement Study

4. 3D-optimized SRAM Macro Design and Application to Memory-on-Logic 3D-IC at Advanced Nodes

5. Novel stacked CMOS image sensor with advanced Cu2Cu hybrid bonding

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