1. Study of Adiabatic Logic-Based Combinational and Sequential Circuits for Low-Power Applications;Low Power Architectures for IoT Applications;2023
2. Implementation of ALU Using Partial Adiabatic Logic Style;Advances in Sustainability Science and Technology;2022-10-02
3. Area Efficient and Low Power Half Subtractor Using Transmission Gate CMOS Logic;2022 IEEE Region 10 Symposium (TENSYMP);2022-07-01
4. Novel CMOS and PTL Based Half Subtractor Designs;2021 IEEE International Symposium on Smart Electronic Systems (iSES);2021-12
5. Modified ECRL Adiabatic Logic for Ultra Low Power VLSI Applications;2021 5th International Conference on Electrical Engineering and Information Communication Technology (ICEEICT);2021-11-18