Comparative Analysis of a Proposed Low-Power Adiabatic NOR Gate-Reference-Cited by-同舟云学术

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Comparative Analysis of a Proposed Low-Power Adiabatic NOR Gate

Published:2023-12-13 Issue: Volume:3 Page:1-6
ISSN:
Container-title:2023 26th International Conference on Computer and Information Technology (ICCIT)
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Author:

Ganguly Chamak¹,Meem Mazeda Zafor²,Abdullah Faruque Mohammed¹,Kifayat Kabir S. M³,Hossen Rakib Saeed⁴,Arefin Khandaker Shams³

Affiliation:

1. Primeasia University,Dept. of EEE,Dhaka,Bangladesh

2. Ahsanullah University of Science and Technology,Dept. of EEE,Dhaka,Bangladesh

3. ULKASEMI Pvt. Limited,Circuit and System Design,Dhaka,Bangladesh

4. Neural Semiconductor Limited,Physical Design,Dhaka,Bangladesh

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10440723/10440967/10441109.pdf?arnumber=10441109

Reference18 articles.

1. Adiabatic Logic-Based Area- and Energy-Efficient Full Adder Design

2. Adiabatic Logic Circuits: A Retrospect;Deepti Shinghal;MIT International Journal of Electronics and Communication Engineering,2013

3. Design and analysis of Mux using adiabatic techniques ECRL and PFAL

4. Design and implementation of energy efficient Adiabatic ECRL and basic gates

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