Enabling Energy-Efficient In-Memory Computing With Robust Assist-Based Reconfigurable Sense Amplifier in SRAM Array

Author:

Soundrapandiyan Kavitha1ORCID,Vishvakarma Santosh Kumar2ORCID,Reniwal Bhupendra Singh3ORCID

Affiliation:

1. Department of Electronics and Communications, IIITDM Kancheepuram, Chennai, India

2. Department of Electrical Engineering, Indian Institute of Technology Indore, Madhya Pradesh, Indore, India

3. Department of Electrical Engineering, Indian Institute of Technology (IIT) Jodhpur, Rajasthan, India

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. In-Memory Encryption using XOR-based Feistel Cipher in SRAM Array;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19

2. Design of an efficient VARMAx model to leverage in-memory computing for faster big data analytics;AIP Conference Proceedings;2024

3. Resonant Compute-In-Memory (rCIM) 10T SRAM Macro for Boolean Logic;2023 IEEE 41st International Conference on Computer Design (ICCD);2023-11-06

4. In-Memory Computing with 6T SRAM for Multi-operator Logic Design;Circuits, Systems, and Signal Processing;2023-08-19

5. Guest Editorial Unconventional Computing Techniques for Emerging Technology Applications;IEEE Journal on Emerging and Selected Topics in Circuits and Systems;2023-03

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