Author:
Chen Jian,Zhao Wenfeng,Wang Yuqi,Ha Yajun
Funder
Natural Science Foundation of China
Shanghai Science and Technology Commission Funding
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Cited by
26 articles.
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2. Design of Low Power and Robust Asynchronous SRAM Generated Using AMC Involving SAHB Circuit with QDI Logic;Journal of The Institution of Engineers (India): Series B;2024-03-26
3. An Area-Efficient In-Memory Implementation Method of Arbitrary Boolean Function Based on SRAM Array;IEEE Transactions on Computers;2023-12
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5. Low-Power 4 x 4 SRAM Memory Array Design Using Voltage Mode Technology;2023 7th International Conference on Computation System and Information Technology for Sustainable Solutions (CSITSS);2023-11-02