Analysis of Degradation Mechanisms in Low-Temperature Polycrystalline Silicon Thin-Film Transistors under Dynamic Drain Stress-Reference-Cited by-同舟云学术

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Analysis of Degradation Mechanisms in Low-Temperature Polycrystalline Silicon Thin-Film Transistors under Dynamic Drain Stress

Published:2012-06 Issue:6 Volume:59 Page:1730-1737
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Zhang Meng,Wang Mingxiang,Lu Xiaowei,Wong Man,Kwok Hoi-Sing

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx5/16/6200907/06178788.pdf?arnumber=6178788

Cited by 31 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Asymmetry Degradation Behavior Under Forward and Backward Overlap Dynamical Stress in Large-Size Amorphous InGaZnO TFT;IEEE Transactions on Electron Devices;2024-09

2. Reliability of indium-tin-zinc-oxide thin-film transistors under dynamic drain voltage stress;Applied Physics Letters;2024-07-08

3. Analysis of Degradation Mechanism in Poly-Si TFTs Under Dynamic Gate Voltage Stress With Short Pulse Width Duration;IEEE Electron Device Letters;2024-02

4. Degradation of InSnZnO Thin-Film Transistors Under Negative Bias Stress;IEEE Transactions on Electron Devices;2023-12

5. Investigating DC and AC degradation behaviors to P-type low temperature polycrystalline silicon thin film transistor with fin-like structure;Journal of Physics D: Applied Physics;2023-07-27

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