1. Design and Technology Co-Optimization for Useful Skew Scheduling on Multi-Bit Flip-Flops;2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD);2023-10-28
2. Clock tree generation by abutment in synchoros VLSI design;Microprocessors and Microsystems;2023-10
3. Debanking Techniques on Multi-bit Flip-flops for Reinforcing Useful Clock Skew Scheduling;2023 IEEE 36th International System-on-Chip Conference (SOCC);2023-09-05
4. Synthesis of Clock Networks with a Mode-Reconfigurable Topology;ACM Transactions on Design Automation of Electronic Systems;2022-03-08
5. An OCV-Aware Clock Tree Synthesis Methodology;2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD);2021-11-01