RESURF Region Variation Induced Current Crowding Effect on HV p-LDMOS

Author:

Lee Jian-Hsing1,Li Ching-Ho2,Nidhi Karuna3,Lin Chih-Hsuan1,Chuang Chieh-Yao1,Lin Wei-Hsin1,Hsu Kei-Chieh1,Jou Yeh-Ning1,Huang Shao-Chang1,Liao Chih-Cherng2,Chen Ke-Horng2

Affiliation:

1. Vanguard International Semiconductor Corp.,DE Department,HsinChu City,Taiwan

2. National Yang Ming Chiao Tung University,Department of Electrical and Computer Eng.,HsinChu City,Taiwan

3. Richtek Technology Corp.,ESD Department,ChuPei City,Taiwan

Publisher

IEEE

Reference33 articles.

1. Harnessing the base-pushout effect for ESD protection in bipolar and BiCMOS technologies;streibl;Proc EOS/ESD Symp,2002

2. The influence of NBL layout and LOCUS space on component ESD and system level ESD for HV-LDMOS;lee;IEEE Proc Int Symp on Power Semi Dev & ICs (ISPSD),2007

3. The positive trigger voltage lowering effect for latch-up;lee;Proc IEEE Int Symp Phys and Failure Anal Integr Circuits,2004

4. Tunable Holding-Voltage High Voltage ESD Devices

5. A Combination of Implant Shadow and Skin Effects Leading to HV Devices Failure during the ESD Event

Cited by 1 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A Combination of Implant Shadow and Skin Effects Leading to HV Devices Failure during the ESD Event;2023 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA);2023-07-24

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