A SOI capacitor-less 1T-DRAM concept-Reference-Cited by-同舟云学术

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A SOI capacitor-less 1T-DRAM concept

Published: Issue: Volume: Page:
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Container-title:2001 IEEE International SOI Conference. Proceedings (Cat. No.01CH37207)
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Author:

Okhonin S.,Nagoga M.,Sallese J.M.,Fazan P.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/7596/20711/00958032.pdf?arnumber=958032

Cited by 55 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Energy and Disturbance Analysis of 1T-DRAM With Nanowire Gate-All-Around RFET;IEEE Transactions on Electron Devices;2024-05

2. Capacitorless One-Transistor Dynamic Random-Access Memory with Novel Mechanism: Self-Refreshing;Nanomaterials;2024-01-12

3. 1T DRAM with Raised SiGe Quantum Well for Sensing Margin Improvement;JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE;2023-02-28

4. Dynamic Flash Memory with Fast Block Refresh;2022 20th Non-Volatile Memory Technology Symposium (NVMTS);2022-12-07

5. Design of a Capacitorless DRAM Based on Storage Layer Separated Using Separation Oxide and Polycrystalline Silicon;Electronics;2022-10-18

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