Tiny ci-SAR A/D Converter for Deep Neural Networks in Analog in-Memory Computation
Author:
Affiliation:
1. KU Leuven
2. imec Leuven
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9937201/9937203/09937613.pdf?arnumber=9937613
Reference11 articles.
1. Charge Sharing and Charge Injection A/D Converters for Analog In-Memory Computing
2. Quantization Driven ADC Range Control for Analog in Memory Deep Neural Networks Acceleration;laubeuf;accepted for ACM Transactions on Design Automation of Electronic Systems,2021
3. CONV-SRAM: An Energy-Efficient SRAM With In-Memory Dot-Product Computation for Low-Power Convolutional Neural Networks
4. A 22 nm, 1540 TOP/s/W, 12.1 TOP/s/mm2 in-Memory Analog Matrix-Vector-Multiplier for DNN Acceleration
5. Design-Technology Space Exploration for Energy Efficient AiMC-Based Inference Acceleration
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3. Boosting RRAM-Based Mixed-Signal Accelerators in FD-SOI Technology for ML Applications;IEEE Journal on Exploratory Solid-State Computational Devices and Circuits;2023-12
4. Power-Aware Quantization in Analog In-Memory Computing With STT-MRAM Macro;IEEE Transactions on Magnetics;2023-11
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