Tiny ci-SAR A/D Converter for Deep Neural Networks in Analog in-Memory Computation

Author:

Caselli Michele1,Bhattacharjee Debjyoti2,Mallik Arindam2,Debacker Peter2,Verkest Diederik2

Affiliation:

1. KU Leuven

2. imec Leuven

Publisher

IEEE

Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A Compact and Low-Power Column Readout Circuit based on Digital Delay Chain;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19

2. Physics-Based Compact Model of Independent Dual-Gate BEOL-Transistors for Reliable Capacitorless Memory;IEEE Journal of the Electron Devices Society;2024

3. Boosting RRAM-Based Mixed-Signal Accelerators in FD-SOI Technology for ML Applications;IEEE Journal on Exploratory Solid-State Computational Devices and Circuits;2023-12

4. Power-Aware Quantization in Analog In-Memory Computing With STT-MRAM Macro;IEEE Transactions on Magnetics;2023-11

5. A Column-Parallel Time-Interleaved SAR/SS ADC for Computing in Memory with 2-8bit Reconfigurable Resolution;2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS);2023-06-11

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