A 13-Bit 2-GS/s Time-Interleaved ADC With Improved Correlation-Based Timing Skew Calibration Strategy
Author:
Funder
Tsinghua Initiative Scientific Research Program
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/8919/9694631/09598182.pdf?arnumber=9598182
Cited by 21 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A fully digital timing background calibration algorithm based on first-order auto-correlation for time-interleaved ADCs;Microelectronics Journal;2024-10
2. FAPSO: Fast Adaptive Particle Swarm Optimization-Based Background Timing Skew Calibration for TI-ADCs;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-09
3. An Efficient 1.4-GS/s 10-bit Timing-Skew-Free Time-Interleaved SAR ADC With a Centralized Sampling Frontend;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2024-07
4. A New Artificial Neural Network-Based Calibration Mechanism for ADCs: A Time-Interleaved ADC Case Study;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2024-07
5. A Wideband Timing Mismatch Calibration Design for Time-Interleaved Analog-to-Digital Converters with Fast Convergence;Electronics;2024-06-24
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