A unified model for partial-depletion and full-depletion SOI circuit designs: using BSIMPD as a foundation-Reference-Cited by-同舟云学术

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A unified model for partial-depletion and full-depletion SOI circuit designs: using BSIMPD as a foundation

Published: Issue: Volume: Page:
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Container-title:Proceedings of the IEEE 2003 Custom Integrated Circuits Conference, 2003.
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Author:

Pin Su ,Fung S.K.H.,Wyatt P.W.,Hui Wan ,Mansun Chan ,Niknejad A.M.,Chenming Hu

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/8830/27953/01249395.pdf?arnumber=1249395

Cited by 13 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Symmetric BSIM-SOI—Part I: A Compact Model for Dynamically Depleted SOI MOSFETs;IEEE Transactions on Electron Devices;2024-04

2. Validation of Dynamically Depleted Symmetric BSIM-SOI Compact model for RF SOI T/R Switch Applications;2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM);2024-03-03

3. Nanoscale FETs;Silicon-Based Millimeter-wave Technology - Measurement, Modeling and Applications;2012

4. Key Aspects in Modeling of Thin Epi SOS Technology With Application of BSIMSOI;IEEE Journal of Solid-State Circuits;2011-05

5. Surface-potential-based compact modeling of dynamically depleted SOI MOSFETs;Solid-State Electronics;2010-05

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