1. Su P, Fung SKH, Wyatt PW, Wan H, Chan M, Niknejad AM, et al. A unified model for partial-depletion and full-depletion SOI circuit designs: using BSIMPD as a foundation. In: Proceedings of the IEEE custom integrated circuits conference; 2003. p. 241–4.
2. Fung SKH, Zamdmer N, Oldiges PJ, Sleight J, Mocuta A, Sherony M, et al. Controlling floating-body effects for 0.13μm and 0.10μm SOI CMOS. In: IEDM technical digest; 2000. p. 231–4.
3. A continuous compact MOSFET model for fully- and partially-depleted SOI devices;Sleight;IEEE Trans Electron Dev,1998
4. Wan H, Xi X, Niknejad A, Hu C. BSIMSOI 4.0 MOSFET model. Berkeley, CA: University of California; 2005.
5. Compact modeling of junction current in dynamically depleted SOI MOSFETs;Wu;IEEE Trans Electron Dev,2008