Validation of Dynamically Depleted Symmetric BSIM-SOI Compact model for RF SOI T/R Switch Applications-Reference-Cited by-同舟云学术

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Validation of Dynamically Depleted Symmetric BSIM-SOI Compact model for RF SOI T/R Switch Applications

Published:2024-03-03 Issue: Volume: Page:1-3
ISSN:
Container-title:2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)
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Author:

Nandi Debashish¹,Dabhi Chetan Kumar²,Rajasekaran Dinesh²,Karumuri Naveen³,Turuvekere Sreenidhi³,Swaminathan Balaji³,Srihari Srikanth³,Dutta Anupam³,Hu Chenming²,Chauhan Yogesh Singh¹

Affiliation:

1. Indian Institute of Technology,Department of Electrical Engineering,Kanpur,UP,India

2. University of California,Berkeley Device Modelling Center,Berkeley,CA,USA

3. GlobalFoundries Inc,Bangalore,KA,India

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10511270/10511310/10512295.pdf?arnumber=10512295

Reference9 articles.

1. SOI Devices and Substrates towards RF and Millimeter Wave ICs

2. A unified model for partial-depletion and full-depletion SOI circuit designs: using BSIMPD as a foundation

3. RF SOI Switch FET Design and Modeling Tradeoffs for GSM Applications

4. Symmetric BSIM-SOI—Part I: A Compact Model for Dynamically Depleted SOI MOSFETs

5. Surface-potential-based compact modeling of dynamically depleted SOI MOSFETs

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