Author:
Chen Yung-Chih,Wang Chun-Yao
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software
Cited by
13 articles.
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1. A Don’t-Care-Based Approach to Reducing the Multiplicative Complexity in Logic Networks;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2022-11
2. An Approach to Unlocking Cyclic Logic Locking;Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design;2022-10-30
3. LOOPLock 2.0: An Enhanced Cyclic Logic Locking Approach;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2022-01
4. An Efficient Approximate Node Merging with an Error Rate Guarantee;Proceedings of the 26th Asia and South Pacific Design Automation Conference;2021-01-18
5. Majority Logic Circuit Minimization Using Node Addition and Removal;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2021