An Approach to Unlocking Cyclic Logic Locking-Reference-Cited by-同舟云学术

An Approach to Unlocking Cyclic Logic Locking

Published:2022-10-30 Issue: Volume: Page:
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Container-title:Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design
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Author:

Chen Pei-Pei¹,Yang Xiang-Min²,Li Yi-Ting¹,Chen Yung-Chih³,Wang Chun-Yao¹

Affiliation:

1. National Tsing Hua University, Hsinchu, Taiwan, R.O.C

2. National Tsing Hua University, Hsinchu, Taiwan, R.O.C.

3. National Taiwan University of Science and Technology, Taipei, Taiwan, R.O.C

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3508352.3549461

Reference37 articles.

1. SMT Attack: Next Generation Attack on Obfuscated Circuits with Capabilities and Performance Beyond the SAT Attacks;Azar K. Z.;IACR Trans. on Cryptographic Hardware and Embedded Systems,2019

2. J.-H. Chen , Y.-C. Chen , W.-C. Weng , C.-Y. Huang and C.-Y. Wang , "Synthesis and Verification of Cyclic Combinational Circuits," in Proc. of SOCC , pp. 257 -- 262 , 2015 . J.-H. Chen, Y.-C. Chen, W.-C. Weng, C.-Y. Huang and C.-Y. Wang, "Synthesis and Verification of Cyclic Combinational Circuits," in Proc. of SOCC, pp. 257--262, 2015.

3. Statistical timing verification for transparently latched circuits

4. Fast detection of node mergers using logic implications

5. Fast Node Merging With Don't Cares Using Logic Implications

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