Understanding Hot Carrier Reliability in FinFET Technology from Trap-based Approach-Reference-Cited by-同舟云学术

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Understanding Hot Carrier Reliability in FinFET Technology from Trap-based Approach

Published:2021-12-11 Issue: Volume: Page:
ISSN:
Container-title:2021 IEEE International Electron Devices Meeting (IEDM)
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Author:

Wang Runsheng¹,Sun Zixuan¹,Liu Yue-Yang²,Yu Zhuoqing¹,Wang Zirui¹,Jiang Xiangwei²,Huang Ru¹

Affiliation:

1. Institute of Microelectronics, Peking University,Beijing,China,100871

2. Institute of Semiconductors, Chinese Academy of Sciences,State Key Laboratory of Superlattices and Microstructures,Beijing,China,100083

Funder

NSFC

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9720433/9720494/09720674.pdf?arnumber=9720674

Reference22 articles.

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1. On the Understanding and Modeling of Non-Negligible Subthreshold-State Degradation (SSD) in Sub-20-nm DRAM Technology;IEEE Electron Device Letters;2024-09

2. CMOS Scaling for the 5 nm Node and Beyond: Device, Process and Technology;Nanomaterials;2024-05-09

3. Investigation of Interplays between Body Biasing and Hot Carrier Degradation (HCD) in Advanced NMOS FinFETs;2024 IEEE International Reliability Physics Symposium (IRPS);2024-04-14

4. Impact of Hot Carrier Degradation and Bias Temperature Instability on GHz Cycle-to-Cycle Variation in Ultra-Scaled FinFETs;2024 IEEE International Reliability Physics Symposium (IRPS);2024-04-14

5. A Review of Reliability in Gate-All-Around Nanosheet Devices;Micromachines;2024-02-13

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