Reducing the Impact of Phase-Change Memory Conductance Drift on the Inference of large-scale Hardware Neural Networks
Author:
Publisher
IEEE
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http://xplorestaging.ieee.org/ielx7/8971803/8993428/08993482.pdf?arnumber=8993482
Cited by 49 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. 28 nm FDSOI embedded PCM exhibiting near zero drift at 12 K for cryogenic SNNs;npj Unconventional Computing;2024-09-02
2. HYDRA: A Hybrid Resistance Drift Resilient Architecture for Phase Change Memory-Based Neural Network Accelerators;IEEE Transactions on Computers;2024-09
3. Difficulties and approaches in enabling learning-in-memory using crossbar arrays of memristors;Neuromorphic Computing and Engineering;2024-08-01
4. 28 nm FD-SOI embedded phase change memory exhibiting near-zero drift at 12 K for cryogenic spiking neural networks (SNNs);2024-04-26
5. Hardware-aware training for large-scale and diverse deep learning inference workloads using in-memory computing-based accelerators;Nature Communications;2023-08-30
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