HYDRA: A Hybrid Resistance Drift Resilient Architecture for Phase Change Memory-Based Neural Network Accelerators-Reference-Cited by-同舟云学术

HYDRA: A Hybrid Resistance Drift Resilient Architecture for Phase Change Memory-Based Neural Network Accelerators

Published:2024-09 Issue:9 Volume:73 Page:2123-2135
ISSN:0018-9340
Container-title:IEEE Transactions on Computers
language:
Short-container-title:IEEE Trans. Comput.

Author:

Nguyen Thai-Hoang¹^ORCID,Imran Muhammad²^ORCID,Choi Jaehyuk³^ORCID,Yang Joon-Sung⁴^ORCID

Affiliation:

1. Design Technology Team, Memory Business, Samsung Electronics, Hwaseong, Korea

2. Department of Electrical Engineering, School of Electrical Engineering and Computer Science (SEECS), National University of Sciences and Technology (NUST), Islamabad, Pakistan

3. Department of Semiconductor Systems Engineering, Sungkyunkwan University, Suwon, Korea

4. School of Electrical and Electronic Engineering, Department of Systems Semiconductor Engineering and BK21 Graduate Program in Intelligent Semiconductor Technology, Yonsei University, Seoul, Korea

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Link

http://xplorestaging.ieee.org/ielx8/12/10631806/10570343.pdf?arnumber=10570343

Reference37 articles.

1. ISAAC

2. Computational phase-change memory: beyond von Neumann computing

3. Mixed-Precision Deep Learning Based on Computational Memory

4. Accurate deep neural network inference using computational phase-change memory

5. DRAM errors in the wild

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