Embedded wafer level ball grid array (eWLB) technology for system integration

Author:

Pressel K.,Beer G.,Meyer T.,Wojnowski M.,Fink M.,Ofner G.,Romer B.

Publisher

IEEE

Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Broadband Low-Loss Fan-In Chip-to-Package Interconnect Enabling System-in-Package Applications Beyond 220 GHz;IEEE Transactions on Components, Packaging and Manufacturing Technology;2024-05

2. High Performance Antenna-in-Package with Test Socket for Millimeter-Wave System;2024 International Conference on Electronics Packaging (ICEP);2024-04-17

3. Embedded Wafer-Level Ball Grid Array (eWLB) Packaging Technology Platform;Advances in Embedded and Fan-Out Wafer-Level Packaging Technologies;2019-04-19

4. 3D Integration;Fan-Out Wafer-Level Packaging;2018

5. Overview and Outlook of Three-Dimensional Integrated Circuit Packaging, Three-Dimensional Si Integration, and Three-Dimensional Integrated Circuit Integration;Journal of Electronic Packaging;2014-10-15

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