22-nm FDSOI CMOS Noise Modeling and Analysis in mm-Wave Frequency Range
Author:
Affiliation:
1. Center Nanoelectronic Technologies, Fraunhofer IPMS,Dresden,Germany
2. Fab1, GlobalFoundries,Dresden,Germany
3. Brandenburg University of Technology,Ulrich-L.-Rohde Chair of Radio Frequency and Microwave Techniques,Cottbus,Germany
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10046197/10046144/10046210.pdf?arnumber=10046210
Reference11 articles.
1. Analysis of the Relaxed Contacted-Poly-Pitch Effect on the RF Performance of Strained-SiGe-Channel p-FETs in 22nm FDSOI Technology
2. Back gate impact on the noise performances of 22FDX fullydepleted SOI CMOS;kane;Proc 1st IEEE Eur Microwave Integrated Circuits Conf (EuMIC),2021
3. Empirical Large-Signal Modeling of mm-Wave FDSOI CMOS Based on Angelov Model
4. 22nm Fully-Depleted SOI High Frequency Noise Modeling up to 90GHz Enabling Ultra Low Noise Millimetre-Wave LNA Design
5. 22nm FD-SOI Technology with Back-biasing Capability Offers Excellent Performance for Enabling Efficient, Ultra-low Power Analog and RF/Millimeter-Wave Designs
Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Enhanced Accuracy in On-Wafer Noise Figure Measurements at Sub-Terahertz Frequencies;2024 IEEE/MTT-S International Microwave Symposium - IMS 2024;2024-06-16
2. A Compact 120 GHz LNA in 22 nm FD-SOI with Back-Gate Controllable Variable-Gain;2023 18th European Microwave Integrated Circuits Conference (EuMIC);2023-09-18
3. Design and Characterization of a Variable Gain $D$-Band LNA for Optimized Link Budgeting for a 6G Receiver in 22FDX;IEEE Transactions on Microwave Theory and Techniques;2023
4. Induced Back-Gate Noise in FDSOI MOSFET;IEEE Transactions on Circuits and Systems II: Express Briefs;2023
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