Inverse Design of On-Chip Interconnect via Transfer Learning-Based Deep Neural Networks-Reference-Cited by-同舟云学术

Inverse Design of On-Chip Interconnect via Transfer Learning-Based Deep Neural Networks

Published:2023-06 Issue:6 Volume:13 Page:878-887
ISSN:2156-3950
Container-title:IEEE Transactions on Components, Packaging and Manufacturing Technology
language:
Short-container-title:IEEE Trans. Compon., Packag. Manufact. Technol.

Author:

Zhang Jingwei¹^ORCID,Wang Yin-Da¹^ORCID,Wu Yunqiu²^ORCID,Kang Kai²^ORCID,Yin Wen-Yan¹^ORCID

Affiliation:

1. Innovative Institute of Electromagnetic Information and Electronic Integration (EIEI), Key Laboratory of Advanced Micro/Nano Electronic Devices and Smart Systems of Zhejiang Province, College of Information Science and Electronic Engineering, Zhejiang University, Hangzhou, China

2. School of Electronic Science and Engineering, University of Electronic Science and Technology of China (UESTC), Chengdu, China

Funder

National Natural Science Foundation of China

Zhejiang Provincial Research and Development Project of China

Natural Science Foundation of China

Key Basic Research of Basic Strengthening Program of the Science and Technology Commission

Defense Industrial Technology Development Program

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Industrial and Manufacturing Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/5503870/10195990/10167697.pdf?arnumber=10167697

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