Low-Temperature Sandwich Structure Wafer-Level Hermetic Packaging via Three-Layer Simultaneous Bonding for 3-D Microsystems-Reference-Cited by-同舟云学术

Low-Temperature Sandwich Structure Wafer-Level Hermetic Packaging via Three-Layer Simultaneous Bonding for 3-D Microsystems

Published:2022-09 Issue:9 Volume:12 Page:1591-1596
ISSN:2156-3950
Container-title:IEEE Transactions on Components, Packaging and Manufacturing Technology
language:
Short-container-title:IEEE Trans. Compon., Packag. Manufact. Technol.

Author:

Wei Xiaoli¹,Chen Tianyou¹,Fan Ji¹^ORCID

Affiliation:

1. MOE Key Laboratory of Fundamental Physical Quantities Measurement and the Hubei Key Laboratory of Gravitation and Quantum Physics, PGMF and School of Physics, Huazhong University of Science and Technology, Wuhan, China

Funder

National Key Research and Development Program of China

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Industrial and Manufacturing Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/5503870/9913798/09882133.pdf?arnumber=9882133

Reference22 articles.

1. Effects of surface treatment on the bonding quality of wafer-level Cu-to-Cu thermo-compression bonding for 3D integration

2. Design of Cu nanoaggregates composed of ultra-small Cu nanoparticles for Cu-Cu thermocompression bonding

3. Study of Hydrophilic Si Direct Bonding with Ultraviolet Ozone Activation for 3D Integration

4. Wafer-level hermetic MEMS packaging by anodic bonding and its reliability issues

5. Low cross-axis sensitivity micro-gravity microelectromechanical system sandwich capacitance accelerometer

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