Modeling of nMOS transistors for simulation of hot-carrier-induced device and circuit degradation-Reference-Cited by-同舟云学术

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Modeling of nMOS transistors for simulation of hot-carrier-induced device and circuit degradation

Published:1992 Issue:2 Volume:11 Page:235-246
ISSN:0278-0070
Container-title:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
language:
Short-container-title:IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

Author:

Leblebici Y.,Kang S.-M.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Link

http://xplorestaging.ieee.org/ielx1/43/3509/00124402.pdf?arnumber=124402

Cited by 35 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

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2. Compact Physics Hot-Carrier Degradation Model Valid over a Wide Bias Range;Micromachines;2023-10-30

3. The impact of self-heating and its implications on hot-carrier degradation – A modeling study;Microelectronics Reliability;2021-07

4. Investigation of the Impact of Hot-Carrier-Induced Interface State Generation on Carrier Mobility in nMOSFET;IEEE Transactions on Electron Devices;2021-07

5. Analytical modeling of subthreshold current and swing of strained‐Si graded channel dual material double gate MOSFET with interface charges and analysis of circuit performance;International Journal of Numerical Modelling: Electronic Networks, Devices and Fields;2020-08-06

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