Design space exploration (DSE) for over-136GB/s IO bandwidth with LPDDR5X SDRAM packages on SOC package in 200mm<sup>3</sup>-Reference-Cited by-同舟云学术

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Design space exploration (DSE) for over-136GB/s IO bandwidth with LPDDR5X SDRAM packages on SOC package in 200mm³

Published:2023-05 Issue: Volume: Page:
ISSN:
Container-title:2023 IEEE 73rd Electronic Components and Technology Conference (ECTC)
language:
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Author:

Lee Heeseok¹,Jeong James¹,Pak Jun So¹,Yoo Jongkyu¹,Jung Woobin¹,Cho Young-Sang¹,Jo Hyungyung¹,Joo Kisu¹,Hwang Jisoo¹,Jang Jaegwon¹

Affiliation:

1. Samsung Electronics Co., Ltd,System LSI,Gyeonggi-do,Korea

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10195193/10195244/10195615.pdf?arnumber=10195615

Reference21 articles.

1. Advanced Chip Last Process Integration for Fan Out WLP

2. High Fluorescence Photosensitive Materials for AOI Inspection of Fan-Out Panel Level Package

3. Realization of high A/R and fine pitch Cu pillars incorporating high speed electroplating with novel strip process

4. Optimizing ODT condition and Driver's turn-on resistance to achieve SI of LPDDR dual rank configuration

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