Interfacial Oxide Layer Scavenging in Ferroelectric Hf0.5Zr0.5O2-Based MOS Structures With Ge Channel for Reduced Write Voltages-Reference-Cited by-同舟云学术

Interfacial Oxide Layer Scavenging in Ferroelectric Hf_0.5Zr_0.5O₂-Based MOS Structures With Ge Channel for Reduced Write Voltages

Published:2023-08 Issue:8 Volume:70 Page:4479-4483
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Park Chinsung¹^ORCID,Kashyap Harshil²^ORCID,Das Dipjyoti¹^ORCID,Hur Jae³^ORCID,Tasneem Nujhat¹^ORCID,Lombardo Sarah⁴,Afroze Nashrah¹,Chern Winston¹,Kummel Andrew C.²,Yu Shimeng¹^ORCID,Khan Asif Islam¹^ORCID

Affiliation:

1. School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA

2. School of Materials Science and Engineering, University of California at San Diego, La Jolla, CA, USA

3. Intel Corporation, Hillsboro, OR, USA

4. TEL Technology Center, America, LLC, Albany, NY, USA

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

https://ieeexplore.ieee.org/ielam/16/10194493/10177213-aam.pdf

Reference20 articles.

1. A Ge-Channel Ferroelectric Field Effect Transistor With Logic-Compatible Write Voltage

2. ZrO2 Ferroelectric FET for Non-volatile Memory Application

3. Ultralow Defect Density at Sub-0.5 nm HfO2/SiGe Interfaces via Selective Oxygen Scavenging

4. Thermal decomposition pathway of Ge and Si oxides: observation of a distinct difference

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