Die to Wafer Stacking with Low Temperature Hybrid Bonding
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9151098/9159179/09159377.pdf?arnumber=9159377
Cited by 25 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
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3. Development of high reliability $6\ \mu\mathrm{m}$-pitch Cu-Cu connections using over-400mm2-large Chip on Wafer bonding process;2023 IEEE 73rd Electronic Components and Technology Conference (ECTC);2023-05
4. A Study on Multi-chip Stacking Process by Novel Dielectric Polymer Adhesive for Cu-Cu Hybrid Bonding;2023 IEEE 73rd Electronic Components and Technology Conference (ECTC);2023-05
5. Critical Challenges with Copper Hybrid Bonding for Chip-to-Wafer Memory Stacking;2023 IEEE 73rd Electronic Components and Technology Conference (ECTC);2023-05
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