A 30-MHz BW 74.6-dB SNDR 92-dB SFDR CT ΔΣ Modulator with Active Body-Bias DAC Calibration in 22nm FDSOI CMOS-Reference-Cited by-同舟云学术

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A 30-MHz BW 74.6-dB SNDR 92-dB SFDR CT ΔΣ Modulator with Active Body-Bias DAC Calibration in 22nm FDSOI CMOS

Published:2022-04 Issue: Volume: Page:
ISSN:
Container-title:2022 IEEE Custom Integrated Circuits Conference (CICC)
language:
Short-container-title:

Author:

Runge Marcel¹,Edler Julius¹,Schmock Dario²,Kaiser Tobias¹,Gerfers Friedel¹

Affiliation:

1. Technische Universitat,Berlin,Germany

2. Ethernovia BV,Netherlands

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9772767/9772730/09772799.pdf?arnumber=9772799

Reference6 articles.

1. A 71. 4dB SNDR 30MHz BW Continuous-Time Delta-sigma Modulator Using a Time-Interleaved Noise-Shaping Quantizer in 12-nm CMOS

2. An 8×-OSR 25MHz-BW 79.4dB/74dB DR/SNDR CT DS Modulator Using 7b Linearized Segmented DACs with Digital Noise-Coupling-Compensation Filter in 7nm FinFET CMOS;lo;IEEE ISSCC,2019

3. 28.2 An 11.4mW 80.4dB-SNDR 15MHz-BW CT delta-sigma modulator using 6b double-noise-shaped quantizer

4. A 50MHZ-BW continuous-time ΔΣ ADC with dynamic error correction achieving 79.8dB SNDR and 95.2dB SFDR

5. A DAC Linearization Technique Enabling 15-Bit INL through Adaptive Body-Biasing in 22FDX

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