A DAC Linearization Technique Enabling 15-Bit INL through Adaptive Body-Biasing in 22FDX
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Publisher
IEEE
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http://xplorestaging.ieee.org/ielx7/9179985/9180369/09180953.pdf?arnumber=9180953
Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. A DAC Sharing and Linearization Technique for Time-Interleaved Incremental Delta-Sigma ADCs;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19
2. Inverse Modelling Techniques as Dynamic Digital Pre-Distortion for Broadband Systems for CS-DACs Based on Volterra Series Expansion;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-04
3. A Digital Pre-Distortion Technique Canceling Code-and Voltage-Dependent Output Impedance Errors in Current-Steering DACs;2023 IEEE International Symposium on Circuits and Systems (ISCAS);2023-05-21
4. A 30-MHz BW 74.6-dB SNDR 92-dB SFDR CT ΔΣ Modulator with Active Body-Bias DAC Calibration in 22nm FDSOI CMOS;2022 IEEE Custom Integrated Circuits Conference (CICC);2022-04
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