Dynamic read destructive fault in embedded-SRAMs: analysis and march test solution

Author:

Dilillo L.,Girard P.,Pravossoudovitch S.,Virazel A.,Borri S.,Hage-Hassan M.

Publisher

IEEE

Cited by 10 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Fault Detection and Analysis in embedded SRAM for sub nanometer technology;2022 International Conference on Applied Artificial Intelligence and Computing (ICAAIC);2022-05-09

2. Analysis of Open Defect Faults in Single 6T SRAM Cell Using R and C Parasitic Extraction Method;2021 International Conference on Disruptive Technologies for Multi-Disciplinary Research and Applications (CENTCON);2021-11-19

3. On-chip weak resistive defect diagnosis with performance enhancement in 45 nm technology static random access memory;Microelectronics Journal;2021-09

4. Comparing the Impact of Power Supply Voltage on CMOS- and FinFET-Based SRAMs in the Presence of Resistive Defects;Journal of Electronic Testing;2020-04

5. Evaluating the Impact of Temperature on Dynamic Fault Behaviour of FinFET-Based SRAMs with Resistive Defects;Journal of Electronic Testing;2019-03-26

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