An Efficient VLSI Architecture for Convolution Based DWT Using MAC
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/8326586/8326861/08326938.pdf?arnumber=8326938
Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Digital Image Decoder for Efficient Hardware Implementation;Sensors;2022-12-01
2. Design High-Frequency and Low-Power 2-D DWT Based on 9/7 and 5/3 Coefficient Using Complex Multiplier;Inventive Computation and Information Technologies;2021
3. Efficient VLSI architectures of lifting based 3D discrete wavelet transform;IET Computers & Digital Techniques;2020-09-18
4. A Memory Efficient, Multiplierless & Modular VLSI Architecture of 1D/2D Re-Configurable 9/7 & 5/3 DWT Filters Using Distributed Arithmetic;Journal of Circuits, Systems and Computers;2020-02-05
5. A memory and area-efficient distributed arithmetic based modular VLSI architecture of 1D/2D reconfigurable 9/7 and 5/3 DWT filters for real-time image decomposition;Journal of Real-Time Image Processing;2019-07-25
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