An Empirical Compact Model for Ferroelectric Field-Effect Transistor Calibrated to Experimental Data-Reference-Cited by-同舟云学术

An Empirical Compact Model for Ferroelectric Field-Effect Transistor Calibrated to Experimental Data

Published:2022-03 Issue:3 Volume:69 Page:1519-1523
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Wang Zheng¹^ORCID,Tasneem Nujhat¹^ORCID,Islam Muhammad M.¹,Chen Hang¹,Hur Jae¹^ORCID,Chern Winston¹,Yu Shimeng¹^ORCID,Khan Asif²^ORCID

Affiliation:

1. School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA

2. School of Electrical and Computer Engineering and the School of Material Science and Engineering, Georgia Institute of Technology, Atlanta, GA, USA

Funder

Defense Advanced Research Project Agency DARPA

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/16/9722602/09705501.pdf?arnumber=9705501

Reference23 articles.

1. Critical Role of Interlayer in Hf0.5Zr0.5O2 Ferroelectric FET Nonvolatile Memory Performance

2. A Circuit Compatible Accurate Compact Model for Ferroelectric-FETs

3. Guidelines for Ferroelectric FET Reliability Optimization: Charge Matching

4. Direct observation of interface charge behaviors in FeFET by quasi-static split C-V and Hall techniques: Revealing FeFET operation;toprasertpong;IEDM Tech Dig,2019

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3. Charge trapping effect at the interface of ferroelectric/interlayer in the ferroelectric field effect transistor gate stack;Chinese Physics B;2023-07-01

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