FSLAM: an Efficient and Accurate SLAM Accelerator on SoC FPGAs
Author:
Affiliation:
1. University of Illinois at Urbana-Champaign,Department of Electrical and Computer Engineering,Urbana,IL,USA
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9973804/9974184/09974562.pdf?arnumber=9974562
Reference28 articles.
1. π-BA: Bundle Adjustment Acceleration on Embedded FPGAs with Co-observation Optimization
2. π-BA: Bundle Adjustment Hardware Accelerator based on Distribution of 3D-Point Observations
3. An FPGA Based Energy Efficient DS-SLAM Accelerator for Mobile Robots in Dynamic Environment
4. DS-SLAM: A Semantic Visual SLAM towards Dynamic Environments
5. Archytas: A Framework for Synthesizing and Dynamically Optimizing Accelerators for Robotic Localization
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1. edgeSLAM2: Rethinking Edge-Assisted Visual SLAM with On-Chip Intelligence;IEEE INFOCOM 2024 - IEEE Conference on Computer Communications;2024-05-20
2. A High-Performance ORB Accelerator with Algorithm and Hardware Co-design for Visual Localization;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19
3. An Accurate FPGA-Based ORB Feature Extractor for SLAM with Row-Wise Keypoint Selection;2024 IEEE International Conference on Consumer Electronics (ICCE);2024-01-06
4. A CNN-Based Real-Time Dense Stereo SLAM System on Embedded FPGA;Lecture Notes in Computer Science;2024
5. NORB: A Stream-Based and Non-Blocking FPGA Accelerator for ORB Feature Extraction;2023 30th IEEE International Conference on Electronics, Circuits and Systems (ICECS);2023-12-04
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