An 8-bit 450-MS/s single-bit/cycle SAR ADC in 65-nm CMOS-Reference-Cited by-同舟云学术

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An 8-bit 450-MS/s single-bit/cycle SAR ADC in 65-nm CMOS

Published:2013-09 Issue: Volume: Page:
ISSN:
Container-title:2013 Proceedings of the ESSCIRC (ESSCIRC)
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Author:

Tripathi Vaibhav,Murmann Boris

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/6641026/6649054/06649086.pdf?arnumber=6649086

Cited by 21 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. The Race for the Extra Pico Second without Losing the Decibel: A Partial-Review of Single-Channel Energy-Efficient High-Speed Nyquist ADCs;2024 IEEE Custom Integrated Circuits Conference (CICC);2024-04-21

2. Memristor-based storage system with convolutional autoencoder-based image compression network;Nature Communications;2024-02-07

3. A 14-bit 1-GS/s Pipelined-SAR ADC in 28-nm CMOS with Foreground and Background Calibration;Journal of Physics: Conference Series;2023-10-01

4. A 10-Bit 400 MS/s Dual-Channel Time-Interleaved SAR ADC Based on Comparator Multiplexing;Electronics;2023-09-27

5. Single-shot optical neural network;Science Advances;2023-06-23

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