Quadruple and Sextuple Cross-Coupled SRAM Cell Designs With Optimized Overhead for Reliable Applications-Reference-Cited by-同舟云学术

Quadruple and Sextuple Cross-Coupled SRAM Cell Designs With Optimized Overhead for Reliable Applications

Published:2022-06 Issue:2 Volume:22 Page:282-295
ISSN:1530-4388
Container-title:IEEE Transactions on Device and Materials Reliability
language:
Short-container-title:IEEE Trans. Device Mater. Relib.

Author:

Yan Aibin¹^ORCID,Xiang Jing¹,Cao Aoran¹,He Zhihui¹,Cui Jie¹^ORCID,Ni Tianming²^ORCID,Huang Zhengfeng³^ORCID,Wen Xiaoqing⁴^ORCID,Girard Patrick⁵^ORCID

Affiliation:

1. Key Laboratory of Intelligent Computing and Signal Processing of Ministry of Education, School of Computer Science and Technology, Anhui University, Hefei, China

2. College of Electrical Engineering, Anhui Polytechnic University, Wuhu, China

3. School of Electronic Science and Applied Physics, Hefei University of Technology, Hefei, China

4. Graduate School of Computer Science and Systems Engineering, Kyushu Institute of Technology, Fukuoka, Japan

5. Laboratory of Informatics, Robotics and Microelectronics of Montpellier, UMR 5506, University of Montpellier/CNRS, Montpellier, France

Funder

National Natural Science Foundation of China

NSFC-Japan Society for the Promotion of Science (JSPS) Exchange Program

Open Project of the State Key Laboratory of Computing Institute of Chinese Academy of Sciences

JSPS Grant-in-Aid for Scientific Research

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Safety, Risk, Reliability and Quality,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/7298/9789687/09775177.pdf?arnumber=9775177

Reference38 articles.

1. High-Performance Double-Node-Upset-Tolerant and Triple-Node-Upset-Tolerant Latch Designs

2. Soft Error Rate Reduction of Combinational Circuits Using Gate Sizing in the Presence of Process Variations

3. Design of a Triple-Node-Upset Self-Recoverable Latch for Aerospace Applications in Harsh Radiation Environments

4. Novel Low Cost, Double-and-Triple-Node-Upset-Tolerant Latch Designs for Nano-scale CMOS

5. A radiation harden enhanced Quatro (RHEQ) SRAM cell

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