Design of an SRAM-bitcell with enhanced self-recoverability from soft errors for space and critical terrestrial applications-Reference-Cited by-同舟云学术

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Design of an SRAM-bitcell with enhanced self-recoverability from soft errors for space and critical terrestrial applications

Published:2024-05 Issue: Volume:96 Page:102137
ISSN:0167-9260
Container-title:Integration
language:en
Short-container-title:Integration

Author:

Prasad Govind^ORCID,Mandi Bipin Chandra,Ali Maifuz

Publisher

Elsevier BV

Reference28 articles.

1. Soft-error-aware SRAM for terrestrial applications;Prasad;IEEE Trans. Device Mater. Reliab.,2021

2. Upset hardened memory design for submicron CMOS technology;Calin;IEEE Trans. Nucl. Sci.,1996

3. A soft error tolerant 10T SRAM bit-cell with differential read capability;Shah;IEEE Trans. Nucl. Sci.,2009

4. We-quatro: Radiation-hardened SRAM cell with parametric process variation tolerance;Dang;IEEE Trans. Nucl. Sci.,2017

5. Novel radiation-hardened-by-design (RHBD) 12T memory cell for aerospace applications in nanoscale CMOS technology;Guo;IEEE Trans. Very Large Scale Integr. Syst.,2017

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