A 2-Gb/s Intrapanel Interface for TFT-LCD With a VSYNC-Embedded Subpixel Clock and a Cascaded Deskew and Multiphase DLL-Reference-Cited by-同舟云学术

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A 2-Gb/s Intrapanel Interface for TFT-LCD With a VSYNC-Embedded Subpixel Clock and a Cascaded Deskew and Multiphase DLL

Published:2011-10 Issue:10 Volume:58 Page:687-691
ISSN:1549-7747
Container-title:IEEE Transactions on Circuits and Systems II: Express Briefs
language:
Short-container-title:IEEE Trans. Circuits Syst. II

Author:

Chi Hyung-Joon,Choi Young-Ho,Lee Soo-Min,Sim Jae-Yoon,Park Hong-June,Lim Jong-Jin,Kang Pil-Sung,Lee Bu-Yeol,Hong Jin-Cheol,Lee Hee-Sub

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/8920/6045691/06035764.pdf?arnumber=6035764

Cited by 11 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

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4. A 0.83-pJ/Bit 6.4-Gb/s HBM Base Die Receiver Using a 45° Strobe Phase for Energy-Efficient Skew Compensation;IEEE Transactions on Circuits and Systems II: Express Briefs;2020-10

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