Author:
Naik Surya,Chandel Rajeevan
Cited by
9 articles.
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1. Design and Analysis of Low-Power and Area-Efficient Master-Slave Flip-Flop;IETE Journal of Research;2024-05-21
2. Design and Analysis of 18T Master-Slave Flip-Flop Circuit;2023 12th International Conference on System Modeling & Advancement in Research Trends (SMART);2023-12-22
3. A Conditional Feedthrough Pulsed Flip-Flop using MTCMOS Technique;2023 4th International Conference for Emerging Technology (INCET);2023-05-26
4. Comparative Exploration of Gate Count and Leakage Optimized D-Latch in Nanometer CMOS;2023 33rd International Conference Radioelektronika (RADIOELEKTRONIKA);2023-04-19
5. Power optimization in TSPC D flip-flop based 4-bit counter;i-manager’s Journal on Electronics Engineering;2022