On the modeling of polysilicon emitter bipolar transistors
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx1/16/12117/00556149.pdf?arnumber=556149
Cited by 22 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Hot-Carrier-Damage-Induced Current Gain Enhancement (CGE) Effects in SiGe HBTs;IEEE Transactions on Electron Devices;2018-06
2. A simple method for pinhole detection in carrier selective POLO-junctions for high efficiency silicon solar cells;Solar Energy Materials and Solar Cells;2017-12
3. A comprehensive semi-analytical model of the polysilicon emitter contact in bipolar transistors;Journal of Computational Electronics;2017-10-05
4. Introducing pinhole magnification by selective etching: application to poly-Si on ultra-thin silicon oxide films;Energy Procedia;2017-09
5. Pinhole density and contact resistivity of carrier selective junctions with polycrystalline silicon on oxide;Applied Physics Letters;2017-06-19
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