A fast hybrid multiplier combining Booth and Wallace/Dadda algorithms

Author:

Millar B.,Madrid P.E.,Swartzlander E.E.

Publisher

IEEE

Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. High-Performance Accurate and Approximate Multipliers for FPGA-Based Hardware Accelerators;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2022-02

2. 8-Bit NCL Asynchronous Multiplier based on Radix-4 Booth Algorithm;IOP Conference Series: Materials Science and Engineering;2020-09-01

3. Approximate Radix-8 Booth Multipliers for Low-Power and High-Performance Operation;IEEE Transactions on Computers;2016-08-01

4. Signed multiplication technique by means of unsigned multiply instruction;Computers & Electrical Engineering;2011-11

5. A new array architecture for signed multiplication using Gray encoded radix-2moperands;Integration;2007-02

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