High-Density 4T SRAM Bitcell in 14-nm 3-D CoolCube Technology Exploiting Assist Techniques
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Link
http://xplorestaging.ieee.org/ielx7/92/7990278/07904730.pdf?arnumber=7904730
Cited by 11 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A Monolithic 3-Dimensional Static Random Access Memory Containing a Feedback Field Effect Transistor;Micromachines;2022-09-28
2. Single Event Induced Crosstalk of Monolithic 3D Circuits Based on a 22 nm FD-SOI Technology;2022 IEEE International Reliability Physics Symposium (IRPS);2022-03
3. Retention Problem Free High Density 4T SRAM cell with Adaptive Body Bias in 18nm FD-SOI;2022 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems (VLSID);2022-02
4. A loadless 4T SRAM powered by gate leakage current with a high tolerance for fluctuations in device parameters;Japanese Journal of Applied Physics;2021-12-20
5. BLADE: An in-Cache Computing Architecture for Edge Devices;IEEE Transactions on Computers;2020-09-01
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