6.1 A 112Gb/s Serial Link Transceiver With 3-tap FFE and 18-tap DFE Receiver for up to 43dB Insertion Loss Channel in 7nm FinFET Technology

Author:

Zhang Bo1,Vasani Anand1,Sinha Ashutosh2,Nilchi Alireza1,Tong Haitao1,Rao Lakshmi1,Khanoyan Karapet1,Hatamkhani Hamid1,Yang Xiaochen1,Meng Xin1,Wong Alexander2,Kim Jun2,Jing Ping2,Sun Yehui2,Nazemi Ali1,Liu Dean2,Brewster Anthony1,Cao Jun1,Momtaz Afshin1

Affiliation:

1. Broadcom,Irvine,CA

2. Broadcom,San Jose,CA

Publisher

IEEE

Reference6 articles.

1. A 112.5Gb/s ADC-DSP-Based PAM-4 Long-Reach Transceiver with >50dB Channel Loss in 5nm FinFET

2. A 116Gb/s DSP-Based Wireline Transceiver in 7nm CMOS Achieving 6pJ/b at 45dB Loss in PAM-4/Duo-PAM-4 and 52dB in PAM-2;lacroix;ISSCC,2021

3. An 182mW 1–60Gbps Configurable PAM4/NRZ Transceiver for Large Scale ASIC Integration in 7-nm FinFET Technology;kocaman;ISSCC,2022

4. Techniques for high-speed implementation of nonlinear cancellation

5. A 460mW 112Gb/s DSP-Based Transceiver with 38dB Loss Compensation for Next-Generation Data Centers in 7nm FinFET Technology;ali;ISSCC,2020

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1. Digital-to-Analog Converters for 100+ Gb/s Wireline Transmitters: Architectures, Circuits, and Calibration;2024 IEEE Custom Integrated Circuits Conference (CICC);2024-04-21

2. 7.2 A 224Gb/s sub pJ/b PAM-4 and PAM-6 DAC-Based Transmitter in 3nm FinFET;2024 IEEE International Solid-State Circuits Conference (ISSCC);2024-02-18

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4. Advancing Baud Rate Receivers: On Multiple CTLE Parameters Background Adaptation;IEEE Access;2024

5. The Impact of CTLE Poles on Receiver Eye Diagrams;2023 8th International Conference on Integrated Circuits and Microsystems (ICICM);2023-10-20

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