Digital-to-Analog Converters for 100+ Gb/s Wireline Transmitters: Architectures, Circuits, and Calibration
Author:
Affiliation:
1. IBM T.J. Watson Research Center
2. 1BM Research Zurich
3. formerly with IBM T.J. Watson Research Center
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10528947/10528954/10528971.pdf?arnumber=10528971
Reference25 articles.
1. 6.1 A 112Gb/s Serial Link Transceiver With 3-tap FFE and 18-tap DFE Receiver for up to 43dB Insertion Loss Channel in 7nm FinFET Technology
2. A 4.63pJ/b 112Gb/s DSP-Based PAM-4 Transceiver for a Large-Scale Switch in 5nm FinFET
3. Universal Chiplet Interconnect Express (UCIe): An Open Industry Standard for Innovations With Chiplets at Package Level
4. 11.1 A 1.7pJ/b 112Gb/s XSR Transceiver for Intra-Package Communication in 7nm FinFET Technology
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