Deep Understanding of Reliability in Hf-based FeFET during Bipolar Pulse Cycling: Trap Profiling for Read-After-Write Delay and Memory Window Degradation-Reference-Cited by-同舟云学术

Deep Understanding of Reliability in Hf-based FeFET during Bipolar Pulse Cycling: Trap Profiling for Read-After-Write Delay and Memory Window Degradation

Published:2022-12-03 Issue: Volume: Page:
ISSN:
Container-title:2022 International Electron Devices Meeting (IEDM)
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Author:

Cai Puyang¹,Zhu Tianxiang¹,Duan Jiahui²,Sun Zixuan¹,Li Hao¹,Xue Yongkang³,Liu Zhiwei³,Xu Hao²,Zhang Liangliang¹,Wang Xiaolei²,Ji Zhigang³,Wang Runsheng¹,Huang Ru¹

Affiliation:

1. Peking University,School of Integrated Circuits,Beijing,China

2. Key Laboratory of Microelectronics Devices and Integrated Technology, Chinese Academy of Sciences,Beijing,China

3. Shanghai Jiao Tong University,Departure of Micro/Nano Electronics,Shanghai,China

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10019319/10019320/10019441.pdf?arnumber=10019441

Reference19 articles.

1. An Investigation on Border Traps in III–V MOSFETs With an In0.53Ga0.47As Channel

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