Investigation of Positive Bias Temperature Instability in advanced FinFET nodes-Reference-Cited by-同舟云学术

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Investigation of Positive Bias Temperature Instability in advanced FinFET nodes

Published:2024-04-14 Issue: Volume: Page:1-5
ISSN:
Container-title:2024 IEEE International Reliability Physics Symposium (IRPS)
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Author:

Xue Yongkang¹,Yuan Miaojia¹,Li Yu²,Wang Da¹,Wu Maokun¹,Ren Pengpeng¹,Zhang Lining²,Wang Runsheng³,Ji Zhigang¹,Huang Ru³

Affiliation:

1. Shanghai Jiao Tong University,National Key Laboratory of Advanced Micro and Nano Manufacture Technology,Shanghai,China,200240

2. School of Electronic and Computer Engineering, Peking University,Shenzhen,China,518055

3. School of Integrated Circuits, Peking University,Beijing,China,100871

Funder

National Natural Science Foundation of China

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10529283/10529298/10529402.pdf?arnumber=10529402

Reference13 articles.

1. A Realistic Modeling Approach To Explain the Physical Mechanism of TDDB For Automotive Grade-Zero Applications

2. Design-For-Reliability Flow in 7nm Products with Data Center and Automotive Applications

3. Reliability on Evolutionary FinFET CMOS Technology and Beyond

4. Maximizing reliable performance of advanced CMOS circuits—A case study

5. Characterization and simulation of NMOS pass transistor reliability for FPGA routing circuits

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