Advanced System in Package Enabled by Wafer Level Heterogeneous Integration of Chiplets-Reference-Cited by-同舟云学术

Advanced System in Package Enabled by Wafer Level Heterogeneous Integration of Chiplets

Published:2022-12-03 Issue: Volume: Page:
ISSN:
Container-title:2022 International Electron Devices Meeting (IEDM)
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Author:

Bhattacharya S.¹,Lim T. G.¹,Ho D.¹,Chui K. J.¹,Zhang X. W.¹,Rotaru M. D.¹,Sajay B. G.¹,Chai T. C.¹,Chong S. C.¹,Li H. Y.¹,Lim S.¹,Wang X. Y.¹,Jong M. C.¹,Sekhar V. N.¹,Dutta R.¹,Rao Vempati S.¹

Affiliation:

1. Institute of Microelectronics, A*STAR,123444

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10019319/10019320/10019429.pdf?arnumber=10019429

Reference4 articles.

1. Heterogeneous System Level Integration Using Active Si Interposer

2. NetFlex: A 22nm Multi-Chiplet Perception Accelerator in High-Density Fan-Out Wafer-Level Packaging

3. Development of High Density Fan Out Wafer Level Package (HD FOWLP) with Multi-layer Fine Pitch RDL for Mobile Applications

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